The present invention relates in general to a computer system and pertains more particularly to a system that is constructed quite inexpensively employing on the order of 80 integrated circuits and having the capability of communicating with a number of port devices.
One object of the present invention is to provide an improved computer system having manual reset means for controlling the central processing unit.
Another object of the present invention is to provide an improved addressing scheme for the random access memory of the system.
To accomplish the foregoing and other objects of this invention, there is provided a computer system including a central processing unit, means for storing instructions for the central processing unit disclosed as a read-only memory (ROM), random access memory means for storing data, keyboard means for entering data into the computer system, and display means disclosed in the form of a conventional CRT television display. Connections from the central processing unit, (CPU) include control lines, a plurality of data lines, forming a data bus and a plurality of address lines, forming an address bus. The data lines are bi-directional whereas the address lines are uni-directional. The CPU interrogates other components of the computer system by way of the address bus to indicate where the data it is looking for is located. The data bus is the means of communication for data both to and from the CPU. The ROM contains the instructions for the CPU indicating to the CPU what to do, how to carry out the instruction, and where to put the data after the instruction is completed. The CPU essentially looks to the ROM for instructions and then follows the instructions of the ROM. In all communications, the CPU applies address locations to both the ROM, RAM, and keyboard. However, address decoding determines which of these actual memories the CPU is looking for. In the system of this invention only the CPU communicates with all other sections. For example, data is to be transferred from the ROM into the RAM, the transfer is accomplished by way of the CPU. The keyboard means enables entry of instructions and data to the CPU. The system of this invention also includes a video random access memory (video RAM) which couples to a video processing section which in turn couples to a video output terminal or monitor such as a television receiver. Data in the video RAM is automatically displayed on the monitor.
In accordance with one feature of the present invention, there is provided a reset switch which is operable by the operator of the computer system to reset the system by forcing the CPU to a known address. This reset switch resets the microprocessor when it is lost. At power-up the microprocessor (CPU) is reset with instructions being initiated from the ROM starting at an initial address. If at a later time the CPU becomes lost for any reason in accordance with this invention there is provided a reset switch for resetting the CPU starting with execution of instructions from a predetermined address in the ROM. In the disclosed embodiment, this predetermined address is 0066. The reset switch is operable at the conventional interrupt input to the microprocessor. The reset switch preferably has an R-C circuit associated therewith which is charged when the reset switch is released to permit the CPU to continue operation.